This post is to help us distinguish between EOI and Directed-EOI. When a local APIC clears EOI register, it does two things :-
- Clear the appropriate bit in the ISR register of the local APIC.
- Issue a broadcast EOI message to all the IOAPICs in the system.
In Solaris, we clear EOI register of the local APIC at two different places:
- For edge interrupts, we clear EOI register while raising the TPR (Task Priroity register) i.e apic_intr_enter().
- For level-triggered interrupts, we clear EOI register when exiting from interrupt handler i.e apic_intr_exit().
The notion of Directed-EOI had come from x2APIC specification. The Directed-EOI here does not refer to generating broadcast EOI message to all the IOAPICs. What we do here is clear ISR in the local APIC (by writing 0 to EOI register in the local APIC) and then clear the appropriate vector index in the IOAPIC. Some CPUs are capable of masking the broadcast EOI message and that's when Directed-EOI comes handy. Note that Directed-EOI has no meaning when interrupt is Edge. For Edge interrupt, we don't send any Directed-EOI.